Sagantec enables MathStar to migrate Field Programmable Object Arrays to next technology node
FREMONT, Calif., Jan. 7, 2008 Sagantec has enabled MathStar, Inc. to successfully port and optimize its high-performance Field Programmable Object Arrays (FPOAs) that perform at clock rates up to 1 GHz.
MathStar is the leading provider of high-performance, Field Programmable Object Arrays for professional video, machine vision, test and measurement and medical imaging applications. Using Sagantec tools, Mathstar reused its 0.13um production-proven FPOA design and significantly shortened its new 90nm technology implementation. This new implementation was optimized for the new process technology and successfully verified.
"Very high performance reprogrammable arithmetic and logic functions are extremely important to our customers,” said Tim Teckman, vice president, engineering at MathStar. “We wanted to leverage advances in semiconductor process technology to provide higher performance, lower power and cost advantages available at the 90nm process node. To speed implementation of technology to the 90nm CMOS process node, we used Sagantec’s SiClone to automate the migration of our proven 0.13um physical design and take it off our schedule critical path. To be successful in today’s competitive market, fabless semiconductor companies need to take advantage of improvements in process technologies. Sagantec’s tools provide a quick path to foundry independence and technology-node upgrades without the need to totally redesign circuits.”
Coby Zelnik, executive vice president at Sagantec said, “In today’s competitive markets, semiconductor companies must develop innovative strategies for implementing designs in new technologies faster, cheaper and with lower risk. Layout reuse and migration are crucial parts of such a strategy. Using SiClone, Mathstar successfully shortened its implementation time and reduced the engineering effort. By reusing existing and proven designs, it also mitigated the risk associated with new technology implementation.”
SiClone performs hierarchical process migration and layout compaction of physical designs. SiClone accelerates physical implementation and design closure of custom IC design in the latest process technologies. It executes rapid process migration by carefully repositioning all layout elements and polygon edges such that the resulting layout is design rule correct and optimized for its design performance targets. SiClone reduces physical design-cycle time, lowers design costs, enables fast design closure, and improves circuit timing, power consumption and performance.
Sagantec accelerates design to silicon in advanced process technologies. Sagantec’s EDA products enable a dramatic shortcut in the successful deployment of new silicon technology through the use of physical design reuse, automatic process migration and DFM optimization. Sagantec's migration tools are used to redirect designs to either the newest technology or to a different process at the same technology node. Sagantec's DFM solutions accelerate delivery of high-yielding silicon through physical-design optimization. Privately held and funded, its corporate headquarters is at 2075 De La Cruz Blvd, Suite #105, Santa Clara, CA. 95050. Telephone: (408) 727-6290. Facsimile: (408) 727-6290. On the Web at: http://www.sagantec.com.
About MathStar, Inc.
MathStar is a fabless semiconductor company offering best-in-class, high performance programmable logic solutions. MathStar’s Field Programmable Object Array (FPOA) can process arithmetic and logic operations at clock rates up to1 gigahertz, which is up to four times faster than even the most advanced FPGA architectures in many applications. MathStar’s Arrix™ family of FPOAs is a high-performance programmable solution enabling customers in the machine vision, high-performance video, medical imaging, security and surveillance and military markets to rapidly and cost effectively innovate and differentiate their products. For more information please visit www.mathstar.com.